Effects of thermal annealing process on the electrical properties of p+-Si/n-SiC heterojunctions

Abstract

The effects of thermal annealing process on the interface in p+-Si/n-SiC heterojunctions fabricated by using surface-activated bonding are investigated. It is found by measuring their current-voltage (I-V) characteristics that the reverse-bias current and the ideality factor decreased to 2.98 × 10−6 mA/cm2 and 1.03, respectively, by annealing the junctions at 1000 °C. Observation by using transmission electron microscopy indicates that an amorphous layer with a thickness of ∼6 nm is formed at the unannealed interface, which vanishes after annealing at 1000 °C. No structural defects at the interface are observed even after annealing at such a high temperature.