23.3 A highly integrated smartphone SoC featuring a 2.5GHz octa-core CPU with advanced high-performance and low-power techniques

Abstract

This paper describes the high-performance CPU design of a heterogeneous octa-core CPU complex, incorporated into a highly integrated mobile SoC for smartphone applications. The SoC is fabricated in a 28nm high-x metal-gate CMOS, and has a die size of 89mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Cu pillars are used for the die-to-substrate interface with fine substrate trace pitch. The SoC is packaged in a 14mmx14mm, 832 ball, 0.4mm pitch BGA. An integrated cellular modem supports rei. 9, cat. 4 LTE (FDD and TDD), while additional cellular and RF connectivity includes DC-HSPA+, TD-SCDMA, EDGE, 802.11ac, Bluetooth LE, multi-GNSS (GPS, GLONASS, Beidou, Galileo & QZSS), and ANT+. Multimedia features are highlighted by a high-performance Power-VR Series6 GPU, support for WQXGA displays (2560×1600), a 20Mpixel image processor and camera interface, and ultra-HD video playback support for H.264 and VP9.