Negative-resistance read and write schemes for STT-MRAM in 0.13µm CMOS

Abstract

We present a negative-resistance read scheme and write scheme for spin-torque-transfer (STT) MRAM. A negative resistance shunting an STT-MRAM cell performs a non-destructive read operation, and saves power during write compared with the conventional scheme. Measurements show an 8 ns non-destructive read-access time and an average write power savings of 10.5% for a 16 kb STTMRAM fabricated in 0.13 μm CMOS using a CoFeB/MgO/CoFeB MTJ.