IEEE Transactions on Parallel and Distributed Systems · 2012 · 125 citations · 25 references
ComputingComputer ScienceHigh-performance ComputingComputer ArchitectureParallel ComputingScientific ComputingAccelerator ArchitectureGraphics Processing Unit ArchitectureGraphics Processing Unit ComputingGraphics Processing UnitsHardware AccelerationMatrix ComputationCanonical ProcessError Correction CodesFermi LevelGpgpu ComputingKernel OptimizationMatrix MultiplicationScientific Computing On GpusSearch Space Pruning
In recent years, the use of graphics chips has been recognized as a viable way of accelerating scientific and engineering applications, even more so since the introduction of the Fermi architecture by NVIDIA, with features essential to numerical computing, such as fast double precision arithmetic and memory protected with error correction codes. Being the crucial component of numerical software packages, such as LAPACK and ScaLAPACK, the general dense matrix multiplication routine is one of the more important workloads to be implemented on these devices. This paper presents a methodology for producing matrix multiplication kernels tuned for a specific architecture, through a canonical process of heuristic autotuning, based on generation of multiple code variants and selecting the fastest ones through benchmarking. The key contribution of this work is in the method for generating the search space; specifically, pruning it to a manageable size. Performance numbers match or exceed other available implementations.
25
The Design and Implementation of FFTW3
Matteo Frigo, Steven G. Johnson · Proceedings of the IEEE · 2005 · 5.2K citations
SPIRAL: Code Generation for DSP Transforms
Markus Püschel, José M. F. Moura, Jeremy Johnson et al. · Proceedings of the IEEE · 2005 · 829 citations