Proceedings of the IEEE · 2005 · 5.2K citations · 55 references
EngineeringComputer EngineeringComputer ScienceCompilersComputer ArchitectureHardware-software Co-designData ParallelismDigital Signal ProcessingField-programmable Gate Array ArchitectureFourier AnalysisHardware AccelerationData Processing AlgorithmsDigital Signal Processing AccelerationDigital Signal Processing Block ArchitectureDigital Signal Processing BlocksDiscrete Fourier TransformFast Fourier TransformFourier Transform
FFTW is an implementation of the discrete Fourier transform (DFT) that adapts to the hardware in order to maximize performance. This paper shows that such an approach can yield an implementation that is competitive with hand-optimized libraries, and describes the software structure that makes our current FFTW3 version flexible and adaptive. We further discuss a new algorithm for real-data DFTs of prime size, a new way of implementing DFTs by means of machine-specific single-instruction, multiple-data (SIMD) instructions, and how a special-purpose compiler can derive optimized implementations of the discrete cosine and sine transforms automatically from a DFT algorithm.
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