2005 · 57 citations · 9 references
ComputingComputer EngineeringComputer ScienceComputer ArchitectureComputer SecurityNetwork SecurityIntrusion DetectionNetwork Security ArchitecturePacket FilteringThreat DetectionDeep Packet InspectionHigh PerformanceIntrusion Detection ArchitectureMemory SpaceNetwork Intrusion DetectionPacket InspectionPatternsProcessor Architecture
It has been estimated that computer network worms and virus caused the loss of over $55B in 2003. Network security system use techniques such as deep packet inspection to detect the harmful packets. While software intrusion detection system running on general purpose processors can be updated in response to new attacks. They lack the processing power to monitor gigabit networks. We present a high performance pattern matching co-processor architecture that can be used to monitor and identify a large number of intrusion signature. The design consists of a bank of pattern matchers that are used to implement a highly concurrent filter. The pattern matchers can be programmed to match multiple patterns of various lengths, and are able to leverage the existing databases of threat signatures. We have been able to program the filters to match all the payload patterns defined in the widely used Snort network intrusion detection system at a rate above 7 Gbps, with memory space left to accommodate threat signatures that become available in the future.
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Alfred V. Aho, Margaret J. Corasick · Communications of the ACM · 1975 · 2.9K citations · Full text
Fast Regular Expression Matching Using FPGAs
Reetinder Sidhu, Viktor K. Prasanna · 2001 · 533 citations
Scalable Pattern Matching for High Speed Networks
Chris Clark, D.E. Schimmel · 2004 · 262 citations