A New Preferential Etch for Defects in Silicon Crystals

Abstract

A new preferential etch for (100) and (111) oriented, p‐ and n‐type silicon has been developed. Oxidation‐induced stacking faults, dislocations, swirl, and striations are clearly defined with minimum surface roughness or extraneous pitting. A relatively slow etch rate (∼1 μm per min) at room temperature provides etch control. The long shelf life of this etch allows the solution to be stored in large quantities.