A 33-Megapixel 120-Frames-Per-Second 2.5-Watt CMOS Image Sensor With Column-Parallel Two-Stage Cyclic Analog-to-Digital Converters

Abstract

A 33-megapixel 120-frames/s (fps) CMOS image sensor has been developed. The 7808 × 4336 pixel 2.8-μm pixel pitch CMOS image sensor with 12-bit, column-parallel, two-stage, cyclic analog-to-digital converters (ADCs) and 96 parallel low-voltage differential signaling output ports operates at a data rate of 51.2 Gb/s. The pipelined operation of the two cyclic ADCs reduces the conversion time. This ADC architecture also effectively lowers the power consumption by exploiting the amplifier function of the cyclic ADC. The CMOS image sensor implemented with 0.18-μm technology exhibits a sensitivity of 0.76 V/lx·s without a microlens and a random noise of 5.1 <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-</sup> with no column amplifier gain and 3.0 <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-</sup> with a gain of 7.5 at 120 fps while dissipating only 2.45 and 2.67 W, respectively.