Leakage current and charge trapping behavior in TiO2∕SiO2 high-κ gate dielectric stack on 4H-SiC substrate

Abstract

The TiO2∕SiO2 gate dielectric stack on 4H-SiC substrate has been studied as a high-κ gate dielectric for metal-oxide semiconductor devices. X-ray photoelectron spectroscopy confirmed the formation of stoichiometric TiO2 films. The leakage current through the stack layer was investigated and it has been shown to be a double conduction mechanism. At low fields, the current is governed by properties of the interfacial layer with a hopping like conduction mechanism, while at relatively high electric field, carriers are modulated by a trap assisted tunneling mechanism through traps located below the conduction band of TiO2. The current-voltage characteristics, time evolution of charge transport, and capacitance-voltage behaviors under constant voltage stressing suggest the composite effect of electron trapping and positive charge generation in the dielectric stack layer.