Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX

Abstract

In this brief, we demonstrate using 2-D simulations that the use of a heterodielectric BOX (HDB) above a highly doped ground plane can control the tunneling width at the channel-drain interface and lead to a significant reduction in the ambipolar current in tunnel FETs (TFETs). The HDB consists of SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> under the source and the channel regions, and HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> under the drain region. When the thickness of the HDB is 25 nm and the ground plane is heavily doped, we show that the drain region at the channel-drain interface is effectively depleted. As a result, the tunneling width at the channel-drain interface increases leading to a complete suppression of ambipolar conduction in a TFET even when the gate voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> = -0.8 V.