Testability access of the high speed test features in the Alpha 21264 microprocessor

Abstract

A novel on-chip testability access architecture provides comprehensive tester-driven access to the Alpha 21264 microprocessor's testability features during manufacturing. It also allows simple automatic chip-initiated access that leverages the same features during normal chip operation. The architecture uses the IEEE Std 1149.1 to access all test features by creatively solving a number of problems in accessing the chip's at-speed testability features from an asynchronous test port and slow tester.