2005 · 22 citations · 7 references
EngineeringElectrical EngineeringMicroelectronicsOptoelectronicsPhotonicsCmos Circuit DesignOptical Communication SystemsOptical Signal ProcessingPhotonic Integrated CircuitsReceiver SystemsSilicon PhotonicsCmos Digital Circuit DesignCmos-compatible PhotonicsGainOptical ReceiversReceiver DesignReceiver Front-endsSensitivitySmall-signal Gain
A 1 V, 10 mW CMOS optical receiver front-end that achieves 10 Gb/s operation is presented. The linear gain is 65.6 dB/spl Omega/ (1.9 k/spl Omega/) and the optical sensitivity is -13.1 dBm for a BER of 1e/sup -12/. The receiver is implemented in a 0.12 /spl mu/m digital CMOS process with a core size of 175 /spl mu/m/spl times/250 /spl mu/m.
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Modeling of passive elements with ASITIC
Ali M. Niknejad · 2003 · 41 citations
Modeling of passive elements with ASITIC
A.M. Niknejad · 2003 · 18 citations