A new methodology for accurate trace collection and its application to memory hierarchy performance modeling

Abstract

Trace-driven simulation is commonly used to predict the performance of computer systems. However, existing tracing techniques are flawed: they do not usually record operating system references, and they produce only relatively short traces. This dissertation explores the impact these trace errors have on the performance estimates of uniprocessor memory hierarchies using multiprogramming workloads. To obtain long and complete traces, we have developed BACH (BYU Address Collection Hardware). BACH captures every reference, can record arbitrarily long traces, and suffers a time dilation of less than two percent. Memory hierarchy performance is quantified using BACH traces of the SPEC SDM1.1 benchmark suite executing on an i486 CPU. To evaluate variations due to operating systems we compare these results under both Mach 3.0 and UNIX System V R4. We conclude that for current uniprocessors, long but incomplete traces result in only modest estimation errors. However, for proposed architectures with large delays to main memory, incomplete traces will cause significant errors in performance estimates.