Magneto-resistive IC memory limitations and architecture implications

Abstract

Magnetoresistive (MR) elements offer an alternative approach to nonvolatile VLSI memory. The approach has unique aspects which are related to the requirements of high speed, high density, deep sub-micron VLSI memory. The limitations of resistor thermal noise, sensing power, write current, switch fan-out, bandwidth, and voltage supply are discussed. Possible MRAM array architectures are listed, and a novel architecture called the cross point magnetic tunnel junction (MTJ) MRAM is described that potentially offers higher signal-to-noise ratio, lower power and higher density than the alternatives. Signal-to-noise ratio (SNR) and power versus bandwidth constraint equations are proposed for MRAM architectures. Sensing alternatives for MR elements are reviewed and voltage requirements of MRAM architectures are described. Finally, MRAM alternatives are compared.