36mW 63GHz CMOS differential low-noise amplifier with 14GHz bandwidth

Abstract

A low-power and wide-band 63GHz CMOS low-noise amplifier (LNA) with a single-ended input and differential outputs is proposed. To realize low power consumption, single-ended amplifiers at the first and second stages as well as an active balun at the last stage are employed. In the single-ended amplifier, the loss caused by the ground impedance is reduced by using a transmission line with ultralow characteristic impedance as the power line, named a zero-ohm transmission line (0??TL). In addition, a common-mode rejection filter (CMRF) is used to improve the common-mode rejection ratio (CMRR) by 6.9 dB in the active balun. The proposed LNA was fabricated by the 1P8M 90 nm CMOS process with a rewiring layer using a wafer-level chip-scale package (W-CSP), and a differential gain of 20dB and a bandwidth of 14GHz were realized with a power consumption of 36mW.