Phase-lock loops of higher orders

Abstract

Phase-lock loops in frequency synthesizer applications often put contradictory requirements on the designers such as: optimization of the noise behaviour and switching speed, leakage of spurious signals, to mention only the most important. The authors discuss cases where phase-lock loops of 3rd, 4th, and 5th order should be used. Since phase margin is small at the 3rd and 5th order loops they are not suitable in instances where a transportation delay is present. Their advantage is a rather large attenuation at high normalized frequencies, i.e. x>>1. On the other hand the 4th order loops with their large phase margin are rather insensitive to additional transportation delay. Their advantage is either notch properties or additional attenuation, however, only in instances where an increased output noise can be tolerated. >