3D processing technology and its impact on iA32 microprocessors

TLDR

3D die stacking bonds two dies face‑to‑face or face‑to‑back to create a 3‑D structure, and dense die‑to‑die interconnects allow complex processors such as the iA32 to be partitioned across two dies, boosting performance and power. This short paper investigates Intel’s implementation of 3D die stacking and reports related research activity. The authors employ face‑to‑face bonding to achieve higher density interconnects, analyze the resulting 3‑D structure, and apply it to a real x86 deeply pipelined high‑performance microprocessor. The initial study demonstrates that a 3D implementation can improve performance by 15 % while simultaneously reducing power consumption by 15 %.

Abstract

This short paper explores an implementation of a new technology called 3D die stacking and describes research activity at Intel. 3D die stacking is the bonding of two die either face-to-face or face-to-back in order to construct the 3D structure. In this work, a face-to-face bonding is utilized because it yields a higher density die-to-die inter-connect than is possible with face-to-back. With sufficiently dense die-to-die interconnect devices as complex as an iA32 microprocessor can be repartitioned or split between two die in order to simultaneously improve performance and power. The 3D structure of this emerging technology is examined and applied in this paper to a real x86 deeply pipelined high performance microprocessor. In this initial study, it is shown that a 3D implementation can potentially improve the performance by 15% while improving power by 15%.