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A 32b CMOS microprocessor with on-chip instruction and data caching and memory management
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1987
Year
Unknown Venue
EngineeringVlsi DesignComputer ArchitectureIntegrated CircuitsProcessor ArchitectureHardware SystemsHardware ArchitectureHardware SecurityCmos TechnologyIntegrated Circuit DesignParallel ComputingElectronic CircuitComputer EngineeringComputer ScienceInstruction SetMicroelectronicsMemory ArchitectureSystem On ChipChip SizeTechnologyCmos MicroprocessorData CachingOn-chip Instruction
A processor implemented with 180K transistors in 2μm CMOS technology will be presented. The chip size is 9.7mm × 9.4mm, and the instruction set is compatible with a minicomputer.