A programmable on-chip picosecond jitter-measurement circuit without a reference-clock input

Abstract

An on-chip jitter measurement circuit in 0.18 /spl mu/m CMOS is demonstrated, using a combination of a programmable delay line, interleaving PFD, and programmable charge pumps. The method does not require a reference clock. Interleaving PFD minimizes bias errors. Measurement linearity is 3.5 /spl mu/V/ps with an error of 1.03ps/sub rms/ for a 2GHz clock.