IEEE Journal of Solid-State Circuits · 1995 · 110 citations · 9 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignDigital Integrated Circuit DesignHigh-frequency Semiconductor DevicesMixed-signal Integrated Circuit DesignMixed-signal IntegrationRadio-frequency Integrated CircuitsCmos Analog Circuit DesignCmos Radio-frequency CircuitsFrequency SynthesisFrequency SynthesizersIntegrated Circuit MixersMixer CircuitsQuadrature MixersRf Cmos Design
A 200 MHz quadrature direct digital frequency synthesizer/complex mixer (QDDFSM) chip is presented. The chip synthesizes 12 b sine and cosine waveforms with a spectral purity of -84.3 dBc. The frequency resolution is 0.047 Hz with a corresponding switching speed of 5 ns and a tuning latency of 14 clock cycles. The chip is also capable of frequency, phase, and quadrature amplitude modulation. These modulation capabilities operate up to the maximum clocking frequency. The chip provides the capability of parallel operation of multiple chips with throughputs up to 800 MHz. The 0.8 /spl mu/m triple level metal N-well CMOS chip has a complexity of 52000 transistors with a core area of 2.6/spl times/6.1 mm/sup 2/. Power dissipation is 2 W at 200 MHz and 5 V.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
9
High-speed CMOS circuit technique
Jiren Yuan, C. Svensson · IEEE Journal of Solid-State Circuits · 1989 · 792 citations
Engineering, Computer Engineering, Electrical Engineering +16
Conditional-Sum Addition Logic
Jack Sklansky · IEEE Transactions on Electronic Computers · 1960 · 567 citations