A simple and fast parallel round-robin arbiter for high-speed switch control and scheduling

Abstract

The design of a fast and fair arbiter is critical to the efficiency of the scheduling algorithm, which is the key to the performance of a high-speed packet switch. In this paper, we propose a parallel round-robin arbiter (PRRA) design, based on a binary-tree structure. We show that our design is simpler and faster than existing round-robin arbiter designs.