2002 · 17 citations · 2 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingAccelerator ArchitectureField-programmable Gate Array ArchitectureFpga ArchitectureFpga Programming ModelsHardware Modeling For Digital SystemsReconfigurable System ArchitectureCompilation For Reconfigurable HardwareConstructorsDynamic Code GenerationField-programmable Gate Arrays (Fpgas)High PerformanceImage Processing AcceleratorsProgramming Model DesignRule-based Systems
FPGA technology offers the potential for low cost, high performance for certain applications, including image processing. However, the programming model which FPGAs typically present to application developers is prohibitively low level. This paper presents a software environment and architecture description approach which enable the dynamic generation of FPGA architectures for high level image processing operations based on image algebra. Scaleable, parameterised architectures can be described using a small set of Prolog constructors which specify an architecture as a parameterised composition of base level building blocks. The environment includes a rule-based generator which produces EDIF netlist files for each high level operation, targeted to Xilinx XC6200 series FPGAs.
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