A 100 MHz output rate analog-to-digital interface for PRML magnetic-disk read channels in 1.2 μm CMOS

Abstract

A key element in the signal path of magnetic-disk read channels employing digital implementations of PRML and other discrete-time signalling approaches is the analog-to-digital (A/D) interface containing a pre-filter, sampler, and analog-to-digital converter (ADC). The pre-filter performs noise filtering, anti-aliasing, and pre-equalization prior to sampling and conversion to the digital domain. At symbol rates of 100 MHz and above, envisioned in the future, implementation of the required filtering is difficult using conventional approaches. This paper describes a filter/ADC combination that uses a switched-capacitor FIR passive sampling approach.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>