Publication | Closed Access
Benchmarking nanotechnology for high-performance and low power logic transistor applications
571
Citations
21
References
2005
Year
Unknown Venue
Low-power ElectronicsElectrical EngineeringElectronic DevicesEngineeringVlsi DesignNovel NanotechnologyNanotechnologyNanoelectronicsElectronic EngineeringApplied PhysicsComputer EngineeringBenchmarking NanotechnologyLogic Transistor ApplicationsNanocomputingMicroelectronicsBeyond CmosNanotechnology ResearchSemiconductor Device
Recent advances in nanotechnology have produced promising nanoelectronic devices—such as carbon‑nanotube, silicon‑nanowire, and III‑V compound semiconductor FETs—that could be integrated onto silicon to enhance circuit functionality and extend Moore’s law. The study aims to benchmark these emerging devices against state‑of‑the‑art silicon logic transistors to assess progress toward high‑performance, low‑power logic applications. Benchmarking was performed by comparing intrinsic speed, energy‑delay product, and electrostatics of the novel devices with planar and nonplanar silicon transistors. The comparison revealed that while the novel devices show promise, their device characteristics and electrostatics still require improvement, underscoring the importance of benchmarking to accelerate nanotechnology research for logic transistors.
Recently there has been tremendous progress made in the research of novel nanotechnology for future nanoelectronics applications. In particular, several novel nanoelectronic devices such as carbon-nanotube field effect transistor (FET), Si nanowire FET, and planar III-V compound semiconductor FET, all hold promise as device candidates to be integrated onto the silicon platform for enhancing circuit functionality and also for extending Moore's law. For high-performance and low-power logic transistor applications, it is important that these research devices are frequently benchmarked against the existing Si logic transistor data in order to gauge the progress of research. In this work, we compare these novel nanoelectronic devices to the state-of-the-art planar and nonplanar Si logic transistors in terms of intrinsic speed, energy-delay product, and electrostatics. The results of this benchmarking exercise indicate that while these novel nanoelectronic devices show promise and opportunities for future logic applications, their device characteristics and electrostatics still need to be improved. We believe that BENCHMARKING is a key element in accelerating the progress of nanotechnology research for logic transistor applications.
| Year | Citations | |
|---|---|---|
Page 1
Page 1