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New high voltage SOI device structure eliminating substrate bias effects
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2002
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Electrical EngineeringSubstrate Bias EffectsEngineeringVlsi DesignAdvanced Packaging (Semiconductors)NanoelectronicsApplied PhysicsTime-dependent Dielectric BreakdownSipos LayerSemiconductor Device FabricationElectronic PackagingSilicon On InsulatorMicroelectronicsConventional Soi DeviceBreakdown VoltageSemiconductor Device
The breakdown voltage of a conventional SOI device is limited because it requires a thicker buried oxide as well as a thicker silicon layer. A new SOI device structure and its substrate are proposed to break through these constraints. The proposed new SOI is characterized by a SIPOS (Semi-Insulating POly-crystalline Silicon) layer inserted between the silicon layer and the buried oxide. Since the SIPOS layer effectively shields the influence of the substrate bias, 600 V breakdown voltage SOI diodes and lateral IGBTs were successfully realized using a 0.8 /spl mu/m SIPOS layer and 0.8 /spl mu/m buried oxide.