Publication | Closed Access
Built-in self-test for system-on-chip: a case study
18
Citations
15
References
2005
Year
Unknown Venue
Hardware SecuritySystem On ChipFpga CoreEngineeringHardware EmulationSoftware TestingVerificationComputer EngineeringComputer ArchitectureCase StudyBuilt-in Self-testProcessor CoreComputer ScienceParallel ComputingFpga Configuration MemoryDesign For Testing
We describe the development of built-in self-test (BIST) for a generic SoC consisting of a field programmable gate array (FPGA) core for application specific logic along with a processor and several memory cores. Our target device was the Atmel AT94K series system-on-chip (SoC), also known as a field programmable system level integrated circuit (FPSLIC). The original goal for this project was to develop BIST configurations to completely test the programmable logic and routing resources of the FPGA core and then to use the FPGA core to test the other cores. We found that the FPGA can provide only limited testing of the some memory cores and even less testing of the processor. The processor, on the other hand, provides more effective testing of some memory cores than the FPGA core. In addition, the ability of the processor to write the FPGA configuration memory provides an improved and more efficient method of testing the FPGA core. As a result, the processor core was the primary testing resource instead of the FPGA.
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