Time-Interleaved Analog-To-Digital Converters: Status and Future Directions

TLDR

Time‑interleaved ADCs merge analog and digital signal processing by using M parallel channels to increase sampling rate. The paper recalls the advantages of time interleaving and investigates the problems of channel mismatches, offering a concise framework for addressing them. The authors analyze mismatch error behavior, review calibration principles and digital enhancement, and discuss identification and correction of channel mismatches. They show that mismatches distort the output signal and reduce system performance, and present a concise framework to mitigate these effects.

Abstract

We discuss time-interleaved analog-to-digital converters (ADCs) as a prime example of merging analog and digital signal processing. A time-interleaved ADC (TI-ADC) consists of M parallel channel ADCs that alternately take samples from the input signal, where the sampling rate can be increased by the number of channels compared to a single channel. We recall the advantages of time interleaving and investigate the problems involved. In particular, we explain the error behavior of mismatches among the channels, which distort the output signal and reduce the system performance significantly, and provide a concise framework for dealing with them. Based on this analysis, we review the principle possibilities of calibrating TI-ADCs, where we point out the necessities and advantages of digital enhancement. To this end, we discuss open issues of channel mismatch identification as well as channel mismatch correction