Publication | Open Access
A 3.3-mW ΣΔ modulator for UMTS in 0.18-μm CMOS with 70-dB dynamic range in 2-MHz bandwidth
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Citations
4
References
2002
Year
Electrical EngineeringEngineeringHigh-frequency DeviceData ConverterDynamic RangeAnalog DesignMixed-signal Integrated CircuitQuadrature Fourth-order0.18-μM Cmos3.3-Mw σδ Modulator70-Db Dynamic RangeDigital Circuit DesignMicroelectronicsAnalog-to-digital ConverterReceiver Chain
A quadrature fourth-order, continuous-time, /spl Sigma//spl Delta/ modulator with 1.5-b quantizer and feedback digital-to-analog converter (DAC) for a universal mobile telecommunication system (UMTS) receiver chain is presented. It achieves a dynamic range of 70 dB in a 2-MHz bandwidth and the total harmonic distortion is -74 dB at full-scale input. When used in an integrated receiver for UMTS, the dynamic range of the modulator substantially reduces the need for analog automatic gain control and its tolerance of large out-of-band interference also permits the use of only first-order prefiltering. An IC including an I and Q /spl Sigma//spl Delta/ modulator, phase-locked loop, oscillator, and bandgap dissipates 11.5 mW at 1.8 V. The active area is 0.41 mm/sup 2/ in a 0.18-/spl mu/m 1-poly 5-metal CMOS technology.
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