Scaling Limit of Bilayer Phosphorene FETs

Abstract

We investigate bilayer phosphorene field-effect transistors (FETs) by self-consistent atomistic quantum transport simulations. Despite a penalty in electrostatic control for multiple layers, 10-nm-channel bilayer phosphorene FETs can exhibit excellent device characteristics, such as I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> > 3 mA/μm, large current ratio (>10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> ), and small subthreshold swing (SS) of 66 mV/dec, with a double-gate device structure. While the scaling of gate dielectric monotonically enhances the overall performance of this device, channel length can only be scaled down to ~8 nm due to significant short-channel effects. We benchmark bilayer phosphorene FETs against bilayer MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and WSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> FETs along with a monolayer phosphorene device, which reveals that bilayer phosphorene FETs have favorable switching characteristics over other similar 2-D bilayer semiconductor devices, making both monolayer and bilayer phosphorene attractive for future switching applications. Our simulation results not only provide the performance and scaling limit of bilayer phosphorene FETs but also create irreplaceable insights into proper device design and parameter optimizations.