Publication | Closed Access
Offline Synthesis of Online Dependence Testing: Parametric Loop Pipelining for HLS
35
Citations
9
References
2015
Year
Unknown Venue
EngineeringHardware Verification LanguageCompiler TechnologyVerificationComputer ArchitectureSoftware EngineeringSystem-level DesignVivado HlsHardware SystemsSoftware AnalysisFormal VerificationComputational TestingHigh-performance ArchitectureParallel ComputingCompilersDynamic CompilationLoop PipeliningHardware-in-the-loop SimulationRuntime VerificationCompiler SupportComputer EngineeringComputer ScienceParametric Loop PipeliningOptimizing CompilerDesign For TestingTransformed PipelinesProgram AnalysisOnline Dependence TestingSoftware TestingFormal MethodsReal-time SystemsOffline Synthesis
Loop pipelining is probably the most important optimization method in high-level synthesis (HLS), allowing multiple loop iterations to execute in a pipeline. In this paper, we extend the capability of loop pipelining in HLS to handle loops with uncertain memory behaviours. We extend polyhedral synthesis techniques to the parametric case, offloading the uncertainty to parameter values determined at run time. Our technique then synthesizes lightweight runtime checks to detect the case where a low initiation interval (II) is achievable, resulting in a run-time switch between aggressive (fast) and conservative (slow) execution modes. This optimization is implemented into an automated source-to-source code transformation framework with Xilinx Vivado HLS as one RTL generation backend. Over a suite of benchmarks, experiments show that our optimization can implement transformed pipelines at almost same clock frequency as that generated directly with Vivado HLS, but with approximately 10× faster initiation interval in the fast case, while consuming approximately 60% more resource.
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