A 10-Gbit/s CMOS burst-mode clock and data recovery IC for a WDM-TDM-PON access network

Abstract

We have developed a 10-Gbit/s burst-mode clock and data recovery IC for future WBM/TDM-PON access networks. A fabricated IC (CMOS) is operated at 10 Gbit/s with preamble bits of 0-16, a duty-cycle variation tolerance of over 15% and a power consumption of 1.2 W.