Publication | Closed Access
A Low Cost Drive Current Enhancement Technique Using Shallow Trench Isolation Induced Stress for 45-nm Node
15
Citations
2
References
2006
Year
Unknown Venue
Pmos TransistorsElectrical EngineeringEngineeringNanoelectronicsElectronic EngineeringSurface ScienceApplied Physics45-Nm NodeStress-induced Leakage CurrentPower Semiconductor DeviceLang110rang Channel OrientationsShallow Trench IsolationPower ElectronicsMicroelectronicsSemiconductor Device
This paper demonstrates, for the first time, that sub-atmospheric chemical vapour deposition (SACVD) oxide is a good candidate for 45-nm node as shallow trench isolation (STI) gap-fill as well as a mobility enhancement technique for both lang100rang and lang110rang channel orientations. Respectively, 11% and 18% drive current enhancement for NMOS and PMOS transistors as well as a 12% ring oscillator speed improvement compared to a conventional high density plasma (HDP) process are reported
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