1985 · 18 citations · 0 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyLeakage Power ReductionMemory DevicesMemory Hierarchy DesignMemory Subsystem DesignMain Memory OrganizationMemory Circuit DesignStatic Cmos CircuitsStatic Random-access Memory Design
1M x 1b CMOS DRAM with 24ns column address access time, 56ns row access time, 30mA average active current and 0.3mA CMOS standby current will be described. The chip has been fabricated with a 1.2μ triple-polysilicon N-well CMOS process.