Watchdog Timers

Watchdog Timers is a hardware-based timing mechanism in embedded systems that automatically detects and recovers from software malfunctions by resetting the system upon failure to receive periodic refresh signals, thereby ensuring reliable operation.

24

Publications

1.3K

Citations

86

Authors

26

Institutions

Publications per year

2017–2026

3

Authors

86

  1. JT
    J. Torin

    Chalmers University of Technology, Sweden

    2 publications · 173 citations

    2

    h-index

  2. GM
    G. Miremadi

    Chalmers University of Technology, Sweden

    2 publications · 173 citations

    2

    h-index

  3. FS
    Frank Stajano

    University of Cambridge, United Kingdom

    1 publications · 19 citations

    1

    h-index

  4. DS
    Dario Schor

    University of Manitoba, Canada

    1 publications · 10 citations

    1

    h-index

  5. HC
    Honglong Chen

    China University of Petroleum, East China, China

    1 publications · 56 citations

    1

    h-index

1–5 of 86

Venues

  1. Zenodo (CERN European Organization for Nuclear Research)

    Repository · 1 publications · 11 citations

    1

    h-index

  2. Future Generation Computer Systems

    FGCS · 1 publications · 56 citations

    1

    h-index

  3. 1

    h-index

  4. IEEE Transactions on Reliability

    1 publications · 68 citations

    1

    h-index

  5. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 1 publications · 12 citations

    1

    h-index

1–5