Concepedia

Warp Scheduling

Warp Scheduling is a thread-level instruction scheduling mechanism in GPU architectures that organizes and manages the execution of groups of threads, called warps, by dispatching them to streaming multiprocessors in a manner that maximizes resource utilization and hides memory latency.

64

Publications

3.7K

Citations

185

Authors

78

Institutions

Publications per year

2017–2026

15

Parents

Publications

64

Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow

Wilson Wai Lun Fung, Ivan Sham, George L. Yuan et al. · 2007 · 727 citations

, , +17

Improving GPU performance via large warps and two-level warp scheduling

Veynu Narasiman, Michael Shebanow, Chang Joo Lee et al. · 2011 · 419 citations

, , +16

Orchestrated scheduling and prefetching for GPGPUs

Adwait Jog, Onur Kayıran, Asit Mishra et al. · 2013 · 186 citations

, , +17

Improving GPGPU resource utilization through alternative thread block scheduling

Minseok Lee, Seokwoo Song, Joosik Moon et al. · 2014 · 175 citations

, , +17

Elf

Wuyang Zhang, Zhezhi He, Luyang Liu et al. · 2021 · 159 citations · Full text

, , +15

1–5 of 64

Authors

185

  1. MA
    Murali Annavaram

    University of Southern California, United States

    8 publications · 319 citations

    8

    h-index

  2. TM
    Tor M. Aamodt

    University of British Columbia, Canada

    5 publications · 1K citations

    5

    h-index

  3. OM
    Onur Mutlu

    Carnegie Mellon University, United States

    5 publications · 711 citations

    5

    h-index

  4. MK
    Myung Kuk Yoon

    Yonsei University, South Korea

    4 publications · 108 citations

    4

    h-index

  5. WW
    Won Woo Ro

    Yonsei University, South Korea

    4 publications · 108 citations

    4

    h-index

1–5 of 185

Institutions

78

  1. University of Southern California

    Los Angeles, United States

    8 h-index

    13 publications

    524 citations

  2. University of British Columbia

    Vancouver, Canada

    6 h-index

    16 publications

    3.7K citations

  3. Intel (United States)

    Santa Clara, United States

    5 h-index

    7 publications

    928 citations

  4. Sapienza University of Rome

    Rome, Italy

    4 h-index

    4 publications

    53 citations

  5. The University of Texas at Austin

    Austin, United States

    4 h-index

    7 publications

    1.4K citations

  6. Carnegie Mellon University

    Pittsburgh, United States

    4 h-index

    4 publications

    658 citations

  7. Yonsei University

    Seoul, South Korea

    4 h-index

    17 publications

    431 citations

  8. California Southern University

    Chandler, United States

    4 h-index

    5 publications

    204 citations

1–8 of 78

Venues

  1. ACM SIGARCH Computer Architecture News

    3 publications · 103 citations

    3

    h-index

  2. IEEE Transactions on Computers

    2 publications · 35 citations

    2

    h-index

  3. Future Generation Computer Systems

    FGCS · 1 publications · 17 citations

    2

    h-index

  4. afips

    1 publications · 18 citations

    1

    h-index

  5. Parallel Computing

    1 publications · 20 citations

    1

    h-index

1–5