Unit Step Response
Unit Step Response is the time-domain output of a first-order circuit resulting from the application of a unit step input, characterized by its transient and steady-state behavior in response to a sudden change in input.
91
Publications
4.5K
Citations
197
Authors
99
Institutions
Publications per year
2017–2026
13
91
Online Estimation of Power System Inertia Constant Under Normal Operating Conditions
Fanhong Zeng, Junbo Zhang, Ge Chen et al. · IEEE Access · 2020 · 134 citations · Full text
Engineering, Electrical Engineering, Systems Engineering +17
Walter Kaufman, S. J. Garrett · IRE Transactions on Circuit Theory · 1962 · 94 citations
1–5 of 91
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National Institute of Technology Rourkela, India
4 publications · 119 citations
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1–5 of 197
99
National Institute of Technology Rourkela
Rourkela, India
4 h-index
9 publications
289 citations
Nippon Institute of Technology
Shiraoka, Japan
2 h-index
4 publications
54 citations
Politecnico di Torino
Turin, Italy
2 h-index
5 publications
83 citations
California Institute of Technology
Pasadena, United States
2 h-index
4 publications
180 citations
École Polytechnique Fédérale de Lausanne
Lausanne, Switzerland
2 h-index
2 publications
36 citations
Tsinghua University
Beijing, China
2 h-index
2 publications
35 citations
Nanyang Technological University
Singapore, Singapore
2 h-index
4 publications
260 citations
St George’s University Hospitals NHS Foundation Trust
London, United Kingdom
2 h-index
5 publications
78 citations
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3 publications · 49 citations
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2 publications · 33 citations
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Repository · 2 publications · 32 citations
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2 publications · 88 citations
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2 publications · 37 citations
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