Unit Step Response

Unit Step Response is the time-domain output of a first-order circuit resulting from the application of a unit step input, characterized by its transient and steady-state behavior in response to a sudden change in input.

91

Publications

4.5K

Citations

197

Authors

99

Institutions

Publications per year

2017–2026

13

Authors

197

  1. SC
    Snehashish Chakraverty

    National Institute of Technology Rourkela, India

    4 publications · 119 citations

    4

    h-index

  2. TH
    Tatsuya Harada

    The University of Tokyo, Japan

    2 publications · 32 citations

    2

    h-index

  3. DB
    Diptiranjan Behera

    National Institute of Technology Rourkela, India

    2 publications · 54 citations

    2

    h-index

  4. BB
    Boris Breznen

    Stony Brook University, United States

    2 publications · 37 citations

    2

    h-index

  5. OW
    Oyas Wahyunggoro

    Universitas Gadjah Mada, Indonesia

    1 publications · 24 citations

    1

    h-index

1–5 of 197

Venues

  1. International Journal of Control

    3 publications · 49 citations

    3

    h-index

  2. 2

    h-index

  3. Zenodo (CERN European Organization for Nuclear Research)

    Repository · 2 publications · 32 citations

    2

    h-index

  4. Symmetry

    2 publications · 88 citations

    2

    h-index

  5. Experimental Brain Research

    2 publications · 37 citations

    2

    h-index

1–5