Concepedia

Unit Delay Modeling

Unit Delay Modeling is a delay modeling approach in which each computational or logical operation is assumed to consume a single, uniform time step, serving as a simplified abstraction for analyzing system timing behavior without accounting for variable or physical delay characteristics.

34

Publications

1.7K

Citations

75

Authors

34

Institutions

Publications per year

2017–2026

4

Parents

Publications

34

Splitting the Unit Delay - Tools for fractional delay filter design

T.I. Laakso, Vesa Välimäki, Matti Karjalainen et al. · IEEE Signal Processing Magazine · 1996 · 535 citations

, , +5

DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs

D. Chen · 2005 · 167 citations

, , +14

On delayed sharing patterns

Pravin Varaiya, Jean Walrand · IEEE Transactions on Automatic Control · 1978 · 106 citations

, , +6

A hierarchical compiled code event-driven logic simulator

David Lewis · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1991 · 76 citations

, , +15

Optimal clock period clustering for sequential circuits with retiming

Peichen Pan, A. Karandikar, C.L. Liu · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1998 · 63 citations

, , +14

1–5 of 34

Authors

75

  1. HN
    H. N. Nham

    Nokia (United States), United States

    4 publications · 141 citations

    4

    h-index

  2. PM
    Peter M. Maurer

    University of South Florida, United States

    3 publications · 56 citations

    3

    h-index

  3. SK
    Sandip Kundu

    University of Massachusetts Amherst, United States

    2 publications · 32 citations

    2

    h-index

  4. AK
    Ajoy K. Bose

    Nokia (United States), United States

    2 publications · 38 citations

    2

    h-index

  5. CL
    Chi-Yuan Lo

    AT&T (United States), United States

    2 publications · 58 citations

    2

    h-index

1–5 of 75

Institutions

34

  1. University of South Florida

    Tampa, United States

    3 h-index

    5 publications

    102 citations

  2. University of California, Berkeley

    Berkeley, United States

    3 h-index

    4 publications

    244 citations

  3. University of Massachusetts Amherst

    Amherst Center, United States

    2 h-index

    4 publications

    64 citations

  4. University of Michigan

    Ann Arbor, United States

    2 h-index

    4 publications

    84 citations

  5. Purdue University West Lafayette

    West Lafayette, United States

    2 h-index

    4 publications

    106 citations

  6. University of Illinois Urbana-Champaign

    Urbana, United States

    2 h-index

    3 publications

    95 citations

  7. Stanford University

    Stanford, United States

    2 h-index

    2 publications

    52 citations

  8. University of Würzburg

    Würzburg, Germany

    2 h-index

    2 publications

    83 citations

1–8 of 34

Venues

  1. 4

    h-index

  2. Design Automation Conference

    Conference · 2 publications · 84 citations

    2

    h-index

  3. Mathematics

    1 publications · 26 citations

    1

    h-index

  4. IEEE Transactions on Automatic Control

    1 publications · 106 citations

    1

    h-index

  5. IEEE Signal Processing Magazine

    1 publications · 535 citations

    1

    h-index

1–5