Transactional Memory Semantics

Transactional Memory Semantics is a formal model of memory consistency that defines the behavior of concurrent transactions by specifying the conditions under which sequences of memory operations appear to execute atomically and in isolation, preserving program order within each transaction while enabling parallelism across transactions.

163

Publications

9.8K

Citations

336

Authors

124

Institutions

Publications per year

2017–2026

6

Authors

336

  1. AA
    Ali-Reza Adl-Tabatabai

    Intel (United States), United States

    12 publications · 1K citations

    12

    h-index

  2. ML
    Michael L. Scott

    University of Rochester, United States

    12 publications · 915 citations

    12

    h-index

  3. RG
    Rachid Guerraoui

    École Polytechnique Fédérale de Lausanne, Switzerland

    12 publications · 1K citations

    11

    h-index

  4. MS
    Michael Spear

    University of Rochester, United States

    11 publications · 800 citations

    11

    h-index

  5. TH
    Tim Harris

    Microsoft Research (United Kingdom), United Kingdom

    10 publications · 511 citations

    10

    h-index

1–5 of 336

Venues

  1. ACM SIGPLAN Notices

    12 publications · 317 citations

    12

    h-index

  2. UR Research (University of Rochester)

    Repository · 6 publications · 213 citations

    6

    h-index

  3. Journal of Parallel and Distributed Computing

    4 publications · 53 citations

    4

    h-index

  4. IEEE Micro

    3 publications · 103 citations

    3

    h-index

  5. ACM SIGARCH Computer Architecture News

    3 publications · 194 citations

    3

    h-index

1–5