Transactional Memory Coherence
Transactional Memory Coherence is a coherence protocol that ensures the atomicity, consistency, and visibility of memory transactions in shared-memory multiprocessor systems by integrating transactional memory semantics with cache coherence mechanisms.
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1.7K
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62
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21
Institutions
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2017–2026
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Transactional Memory Coherence and Consistency
Lance Hammond, Vicky Wong, Mike Y. Chen et al. · ACM SIGARCH Computer Architecture News · 2004 · 647 citations
Transactional memory coherence and consistency
Lance Hammond, Vicky Wong, M. Chen et al. · 2004 · 240 citations
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Stanford University
Stanford, United States
4 h-index
34 publications
9.2K citations

University of Manchester
Manchester, United Kingdom
3 h-index
18 publications
798 citations
Universitat Politècnica de Catalunya
Barcelona, Spain
2 h-index
5 publications
258 citations
Technion – Israel Institute of Technology
Haifa, Israel
2 h-index
6 publications
258 citations

University of Rochester
Rochester, United States
2 h-index
6 publications
702 citations
University of California, Berkeley
Berkeley, United States
1 h-index
1 publications
19 citations

Indian Institute of Technology Hyderabad
Sangāreddi, India
1 h-index
1 publications
18 citations
University of Illinois Urbana-Champaign
Urbana, United States
1 h-index
1 publications
19 citations
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3 publications · 782 citations
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1 publications · 16 citations
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1 publications · 37 citations
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1 publications · 18 citations
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1 publications · 22 citations
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