Timer Architecture

Timer Architecture is a hardware design framework that specifies the organization and operational principles of timing components within a microcontroller, distinguishing itself by enabling precise control, measurement, and generation of time-based signals through programmable registers, clock sources, and counting mechanisms.

166

Publications

5.4K

Citations

519

Authors

191

Institutions

Publications per year

2017–2026

37

Authors

519

  1. MP
    Michael P. Lisanti

    Albert Einstein College of Medicine, United States

    3 publications · 151 citations

    3

    h-index

  2. GV
    George Varghese

    National Institute of Technology Calicut, India

    3 publications · 202 citations

    3

    h-index

  3. FS
    Federica Sotgia

    Thomas Jefferson University, United States

    3 publications · 151 citations

    3

    h-index

  4. MA
    Mohammed Arif

    University of Salford, United Kingdom

    2 publications · 80 citations

    2

    h-index

  5. GB
    Gloria Bonuccelli

    Thomas Jefferson University, United States

    2 publications · 129 citations

    2

    h-index

1–5 of 519

Venues

  1. 6

    h-index

  2. Review of Scientific Instruments

    4 publications · 82 citations

    4

    h-index

  3. Acta acustica united with Acustica

    3 publications · 86 citations

    3

    h-index

  4. PubMed

    Repository · 3 publications · 83 citations

    3

    h-index

  5. 3

    h-index

1–5