Timer Architecture
Timer Architecture is a hardware design framework that specifies the organization and operational principles of timing components within a microcontroller, distinguishing itself by enabling precise control, measurement, and generation of time-based signals through programmable registers, clock sources, and counting mechanisms.
166
Publications
5.4K
Citations
519
Authors
191
Institutions
Publications per year
2017–2026
37
Parents
166
Marta Fumagalli, Simona Daniele, Davide Lecca et al. · Journal of Biological Chemistry · 2011 · 186 citations · Full text
Medicine, Neurobiology, Neuroscience +17
A 14b 80 MS/s SAR ADC With 73.6 dB SNDR in 65 nm CMOS
Ron Kapusta, Junhua Shen, S. Decker et al. · IEEE Journal of Solid-State Circuits · 2013 · 135 citations
Engineering, Computer Engineering, Electrical Engineering +17
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191

University of Salford
Salford, United Kingdom
17 h-index
48 publications
2.4K citations
Digital Wave (United States)
Centennial, United States
3 h-index
6 publications
378 citations

Oakland University
Rochester, United States
2 h-index
4 publications
96 citations
University of California, Berkeley
Berkeley, United States
2 h-index
2 publications
22 citations

Centre National de la Recherche Scientifique
Paris, France
2 h-index
11 publications
232 citations
University of Michigan
Ann Arbor, United States
2 h-index
3 publications
99 citations
University of Wisconsin–Madison
Madison, United States
2 h-index
3 publications
99 citations
University of Southern California
Los Angeles, United States
2 h-index
3 publications
78 citations
1–8 of 191
6 publications · 150 citations
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4 publications · 82 citations
4
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3 publications · 86 citations
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Repository · 3 publications · 83 citations
3
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3 publications · 62 citations
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