Tile Size Optimization
Tile Size Optimization is a memory hierarchy optimization technique that determines the optimal granularity of data blocks, or tiles, to maximize data reuse and minimize memory access latency in nested loop computations.
82
Publications
4K
Citations
273
Authors
120
Institutions
Publications per year
2017–2026
21
Variants
Tiling Optimization
82
Michael Wolfe · 1989 · 430 citations · Full text
Overview of the ITER-like wall project
G.F. Matthews, P. Edwards, T. Hirai et al. · Physica Scripta · 2007 · 202 citations · Full text
Kiran Misra, Andrew Segall, Michael Horowitz et al. · IEEE Journal of Selected Topics in Signal Processing · 2013 · 176 citations
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Institut de Recherche en Informatique et Systèmes Aléatoires, France
5 publications · 110 citations
5
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Colorado State University, United States
4 publications · 212 citations
4
h-index
1–5 of 273
120
Colorado State University
Fort Collins, United States
11 h-index
31 publications
1.3K citations
The Ohio State University
Columbus, United States
8 h-index
29 publications
1.1K citations
Louisiana State University
Baton Rouge, United States
7 h-index
7 publications
283 citations
Institut national de recherche en sciences et technologies du numérique
Le Chesnay-Rocquencourt, France
4 h-index
7 publications
230 citations
University of Utah
Salt Lake City, United States
3 h-index
6 publications
148 citations
Leiden University
Leiden, The Netherlands
3 h-index
5 publications
520 citations
Institut de Recherche en Informatique et Systèmes Aléatoires
Rennes, France
3 h-index
3 publications
60 citations

National Yang Ming Chiao Tung University
Hsinchu, Taiwan
3 h-index
6 publications
108 citations
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TPDS · 3 publications · 142 citations
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3 publications · 78 citations
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2 publications · 66 citations
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2 publications · 77 citations
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2 publications · 72 citations
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