Testbench Reusability
Testbench Reusability is the property of a testbench that enables its adaptation and application across multiple design verification contexts with minimal modification, distinguishing it from single-purpose verification environments by promoting efficiency, consistency, and scalability in testing processes.
10
Publications
256
Citations
30
Authors
10
Institutions
Publications per year
2017–2026
0
Parents
10
Beyond UVM for practical SoC verification
Young-Nam Yun, Jae‐Beom Kim, Namdo Kim et al. · 2011 · 61 citations
Research of reusability based on UVM verification
Wei Ni, Jichun Zhang · 2015 · 35 citations
Practical and efficient SOC verification flow by reusing IP testcase and testbench
Zhaohui Hu, Arnaud Pierres, Hu Shiqing et al. · 2012 · 31 citations
1–5 of 10
30
1
h-index
1
h-index
1 publications · 31 citations
1
h-index
1
h-index
Universidade Estadual de Campinas (UNICAMP), Brazil
1 publications · 33 citations
1
h-index
1–5 of 30
10
Siemens (Germany)
Munich, Germany
2 h-index
2 publications
25 citations
Technische Universität Berlin
Berlin, Germany
1 h-index
2 publications
22 citations

Universidade Federal de Campina Grande
Campina Grande, Brazil
1 h-index
2 publications
66 citations
Samsung (South Korea)
Seoul, South Korea
1 h-index
4 publications
244 citations
Infineon Technologies (Germany)
Munich, Germany
1 h-index
4 publications
56 citations

Hefei University of Technology
Hefei, China
1 h-index
2 publications
70 citations

Universidade Estadual de Campinas (UNICAMP)
Campinas, Brazil
1 h-index
2 publications
66 citations

Fraunhofer Institute for Open Communication Systems
Berlin, Germany
1 h-index
1 publications
11 citations
1–8 of 10
Conference · 1 publications · 13 citations
1
h-index
JSS · 1 publications · 11 citations
1
h-index
Conference · 1 publications · 14 citations
1
h-index
1–3