System-level Parallelism
System-Level Parallelism is a computational paradigm that orchestrates concurrent execution across heterogeneous processing elements within a unified memory and coherence model to enable efficient, scalable, and coordinated parallelism at the hardware-software interface.
327
Publications
19.5K
Citations
1.1K
Authors
291
Institutions
Publications per year
2017–2026
28
327
Very high-speed computing systems
Michael Flynn · Proceedings of the IEEE · 1966 · 951 citations
Overview of the Blue Gene/L system architecture
Alan Gara, Matthias A. Blumrich, D. Chen et al. · IBM Journal of Research and Development · 2005 · 359 citations
1–5 of 327
1.1K
University of Illinois Urbana-Champaign, United States
4 publications · 92 citations
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4
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4
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3
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1–5 of 1.1K
291
University of Illinois Urbana-Champaign
Urbana, United States
14 h-index
39 publications
1K citations
IBM (United States)
Armonk, United States
13 h-index
42 publications
5.3K citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
10 h-index
31 publications
5.4K citations
Carnegie Mellon University
Pittsburgh, United States
10 h-index
28 publications
1.4K citations
Argonne National Laboratory
Lemont, United States
8 h-index
14 publications
1.3K citations
University of Michigan
Ann Arbor, United States
7 h-index
17 publications
763 citations

University of Toronto
Toronto, Canada
7 h-index
13 publications
489 citations

Lawrence Berkeley National Laboratory
Berkeley, United States
7 h-index
27 publications
524 citations
1–8 of 291
10 publications · 629 citations
10
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7 publications · 180 citations
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6 publications · 565 citations
6
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6 publications · 209 citations
6
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Conference · 4 publications · 103 citations
4
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1–5