Symbolic Verification

Symbolic Verification is a formal method of verifying system properties by representing system states and transitions using symbolic representations, typically logical formulas, to enable efficient exploration of large or infinite state spaces.

451

Publications

24.5K

Citations

913

Authors

389

Institutions

Publications per year

2017–2026

60

Authors

913

  1. RE
    Randal E. Bryant

    Carnegie Mellon University, United States

    13 publications · 987 citations

    12

    h-index

  2. TA
    Thomas A. Henzinger

    University of California, Berkeley, United States

    11 publications · 4.4K citations

    11

    h-index

  3. RA
    Rajeev Alur

    University of Pennsylvania, United States

    8 publications · 2.7K citations

    8

    h-index

  4. AC
    Alessandro Cimatti

    Fondazione Bruno Kessler, Italy

    8 publications · 1.3K citations

    8

    h-index

  5. EM
    Edmund M. Clarke

    Carnegie Mellon University, United States

    7 publications · 1.2K citations

    7

    h-index

1–5 of 913

Venues

  1. Electronic Notes in Theoretical Computer Science

    ENTCS · 13 publications · 320 citations

    11

    h-index

  2. 11

    h-index

  3. 10

    h-index

  4. Science of Computer Programming

    8 publications · 215 citations

    8

    h-index

  5. Formal Methods in System Design

    9 publications · 515 citations

    8

    h-index

1–5