Static Power Estimation is a power estimation model that quantifies the steady-state power consumption of a digital circuit due to leakage currents when the circuit is in a stable, non-switching condition.
41
Publications
1.8K
Citations
97
Authors
35
Institutions
Publications per year
2017–2026
1
Variants
Static Power Analysis
Parents
Publications
41
A static power model for architects
J. Adam Butts, Gurindar S. Sohi · 2000 · 389 citations · Full text
Low-power high-level synthesis for FPGA architectures
Jason Cong, Yiping Fan · 2003 · 106 citations
Engineering, Computer Engineering, Electrical Engineering +17
A static power model for architects
J. Adam Butts, Gurindar S. Sohi · 2002 · 104 citations
1–5 of 41
Authors
97
- FN
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h-index
- DC
2
h-index
- JA
2
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- GS
2
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- KK
2
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1–5 of 97
Institutions
35
University of Illinois Urbana-Champaign
Urbana, United States
4 h-index
7 publications
375 citations
University of Michigan
Ann Arbor, United States
3 h-index
4 publications
119 citations
University of Wisconsin–Madison
Madison, United States
2 h-index
4 publications
986 citations
Massachusetts Institute of Technology
Cambridge, United States
2 h-index
4 publications
282 citations
Sasken (India)
Bengaluru, India
2 h-index
2 publications
53 citations
University of Bologna
Bologna, Italy
2 h-index
2 publications
37 citations
Stanford University
Stanford, United States
2 h-index
4 publications
74 citations
Intel (United States)
Santa Clara, United States
1 h-index
1 publications
11 citations
1–8 of 35
Venues
- Integration
2 publications · 31 citations
2
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- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2 publications · 39 citations
2
h-index
- Insight Turkey
1 publications · 31 citations
1
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- American Journal of Applied Sciences
AJAS · 1 publications · 12 citations
1
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- Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001
Conference · 1 publications · 15 citations
1
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