Shared Cache Design

Shared Cache Design is a multicore processor architecture strategy that employs a common cache memory accessible by all processor cores, distinguished from private cache designs by enabling direct data sharing and coherence across cores through a unified storage hierarchy.

131

Publications

6.5K

Citations

480

Authors

125

Institutions

Publications per year

2017–2026

21

Authors

480

  1. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    8 publications · 421 citations

    8

    h-index

  2. NH
    Nikos Hardavellas

    Northwestern University, United States

    3 publications · 442 citations

    3

    h-index

  3. CD
    Chen Ding

    University of Rochester, United States

    3 publications · 73 citations

    3

    h-index

  4. AA
    Anastasia Ailamaki

    École Polytechnique Fédérale de Lausanne, Switzerland

    3 publications · 442 citations

    3

    h-index

  5. ST
    Simon Tam

    Intel (United States), United States

    3 publications · 140 citations

    3

    h-index

1–5 of 480

Venues

  1. IEEE Transactions on Computers

    6 publications · 189 citations

    6

    h-index

  2. ACM SIGARCH Computer Architecture News

    4 publications · 102 citations

    4

    h-index

  3. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 3 publications · 172 citations

    3

    h-index

  4. IEEE Journal of Solid-State Circuits

    3 publications · 153 citations

    3

    h-index

  5. arXiv (Cornell University)

    Repository · 2 publications · 30 citations

    2

    h-index

1–5