Secure Memory Architecture

Secure Memory Architecture is a hardware-software co-designed memory organization model that enforces isolation, confidentiality, and integrity guarantees for sensitive data and code in embedded systems through dedicated cryptographic, access control, and tamper-resistant mechanisms.

89

Publications

4.7K

Citations

242

Authors

95

Institutions

Publications per year

2017–2026

37

Authors

242

  1. YS
    Yan Solihin

    North Carolina State University, United States

    7 publications · 306 citations

    7

    h-index

  2. YZ
    Youtao Zhang

    University of Pittsburgh, United States

    5 publications · 243 citations

    5

    h-index

  3. AA
    Amro Awad

    University of Central Florida, United States

    5 publications · 154 citations

    5

    h-index

  4. JC
    John C. Mitchell

    Stanford University, United States

    4 publications · 931 citations

    4

    h-index

  5. ML
    Mark L. Mitchell

    University of Chicago, United States

    4 publications · 931 citations

    4

    h-index

1–5 of 242

Venues

  1. ACM SIGARCH Computer Architecture News

    3 publications · 631 citations

    3

    h-index

  2. IEEE Transactions on Dependable and Secure Computing

    TDSC · 2 publications · 40 citations

    2

    h-index

  3. 2

    h-index

  4. ACM SIGPLAN Notices

    2 publications · 136 citations

    2

    h-index

  5. IEEE Computer Architecture Letters

    2 publications · 26 citations

    2

    h-index

1–5