Concepedia

Scratchpad Memory Design

Scratchpad Memory Design is a hardware memory architecture approach within GPU systems that employs a software-managed, predictable, and low-latency on-chip memory structure to explicitly control data placement and access, distinguishing itself from cache-based designs by eliminating automatic coherence mechanisms and relying on compiler or programmer-directed data movement.

69

Publications

4.4K

Citations

209

Authors

93

Institutions

Publications per year

2017–2026

11

Parents

Publications

69

Scratchpad memory

R. M. Banakar, Stefan Steinke, Bo-Sik Lee et al. · 2002 · 661 citations

, , +17

Computing in Memory With Spin-Transfer Torque Magnetic RAM

Shubham Jain, Ashish Ranjan, Kaushik Roy et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2017 · 341 citations

, , +13

Assigning Program and Data Objects to Scratchpad for Energy Reduction

Stefan Steinke, Lars Wehmeyer, Bo-Sik Lee et al. · 2002 · 316 citations

, , +17

Dynamic management of scratch-pad memory space

Mahmut Kandemir, J. Ramanujam, Jeff Irwin et al. · 2001 · 254 citations

, , +17

Efficient utilization of scratch-pad memory in embedded processor applications

Preeti Ranjan Panda, Nikil Dutt, Alexandru Nicolau · 1997 · 245 citations

, , +17

1–5 of 69

Authors

209

  1. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    7 publications · 509 citations

    7

    h-index

  2. PM
    Peter Marwedel

    TU Dortmund University, Germany

    5 publications · 1.3K citations

    5

    h-index

  3. BL
    Bo-Sik Lee

    TU Dortmund University, Germany

    5 publications · 1.3K citations

    5

    h-index

  4. ND
    Nikil Dutt

    University of California, Irvine, United States

    5 publications · 492 citations

    5

    h-index

  5. AS
    Aaron Severance

    University of British Columbia, Canada

    4 publications · 188 citations

    4

    h-index

1–5 of 209

Institutions

93

  1. Pennsylvania State University

    State College, United States

    8 h-index

    20 publications

    1.6K citations

  2. TU Dortmund University

    Dortmund, Germany

    5 h-index

    17 publications

    4.4K citations

  3. Northwestern University

    Evanston, United States

    5 h-index

    9 publications

    304 citations

  4. University of California, Irvine

    Irvine, United States

    4 h-index

    9 publications

    1.2K citations

  5. Arizona State University

    Tempe, United States

    4 h-index

    14 publications

    394 citations

  6. Indian Institute of Technology Delhi

    New Delhi, India

    4 h-index

    6 publications

    1K citations

  7. University of Illinois Urbana-Champaign

    Urbana, United States

    4 h-index

    18 publications

    654 citations

  8. IMEC

    Leuven, Belgium

    2 h-index

    4 publications

    104 citations

1–8 of 93

Venues

  1. 3

    h-index

  2. IEEE Transactions on Computers

    2 publications · 93 citations

    2

    h-index

  3. Journal of Signal Processing Systems

    2 publications · 119 citations

    2

    h-index

  4. DROPS (Schloss Dagstuhl – Leibniz Center for Informatics)

    Repository · 2 publications · 51 citations

    2

    h-index

  5. 2

    h-index

1–5