Return Address Stacks

Return Address Stack is a processor microarchitectural structure that stores predicted return addresses for function calls, differentiating itself from general-purpose branch prediction mechanisms by specifically managing the return address hierarchy to enable accurate and efficient control flow prediction during speculative execution.

25

Publications

1.3K

Citations

93

Authors

32

Institutions

Publications per year

2017–2026

3

Variants

Return Address Stack

Authors

93

  1. JE
    James E. Smith

    University of Wisconsin–Madison, United States

    2 publications · 65 citations

    2

    h-index

  2. MM
    Margaret Martonosi

    Princeton University, United States

    1 publications · 35 citations

    1

    h-index

  3. KL
    K.F. Li

    University of Victoria, Canada

    1 publications · 13 citations

    1

    h-index

  4. ES
    Emmanuel Stapf

    Technische Universität Darmstadt, Germany

    1 publications · 15 citations

    1

    h-index

  5. YN
    Yale N. Patt

    The University of Texas at Austin, United States

    1 publications · 38 citations

    1

    h-index

1–5 of 93

Venues

  1. ACM SIGARCH Computer Architecture News

    2 publications · 68 citations

    2

    h-index

  2. Communications of the ACM

    1 publications · 25 citations

    1

    h-index

  3. Computer

    1 publications · 15 citations

    1

    h-index

  4. Information and Computation

    1 publications · 26 citations

    1

    h-index

  5. Journal of Systems Architecture

    JSA · 1 publications · 13 citations

    1

    h-index

1–5