Resistive Network Reduction

Resistive Network Reduction is a method in electrical network analysis that systematically simplifies complex resistor configurations into equivalent, less intricate circuits while preserving terminal behavior.

19

Publications

574

Citations

55

Authors

26

Institutions

Publications per year

2017–2026

2

Authors

55

  1. GS
    Guoyong Shi

    Shanghai Jiao Tong University, China

    1 publications · 11 citations

    1

    h-index

  2. GB
    G. Biorci

    Ferrari (Italy), Italy

    1 publications · 25 citations

    1

    h-index

  3. JC
    J.T. Colvin

    University of Florida, United States

    1 publications · 56 citations

    1

    h-index

  4. RG
    Robert Gonzalez

    Georgia Institute of Technology, United States

    1 publications · 58 citations

    1

    h-index

  5. WS
    W.H.A. Schilders

    Eindhoven University of Technology, Netherlands

    1 publications · 86 citations

    1

    h-index

1–5 of 55

Venues

  1. IEEE Sensors Journal

    2 publications · 29 citations

    2

    h-index

  2. IRE Transactions on Circuit Theory

    2 publications · 40 citations

    2

    h-index

  3. IEEE Electron Device Letters

    1 publications · 27 citations

    1

    h-index

  4. Building and Environment

    1 publications · 31 citations

    1

    h-index

  5. 1

    h-index

1–5